(1) Field of the Invention
The present invention relates to a solid-state imaging device and an imaging device, particularly to a MOS type solid-state imaging device, such as a CMOS (Complementary Metal Oxide Semiconductor) image sensor.
(2) Description of the Related Art
When extremely strong light, such as sunlight, is incident on a CMOS image sensor, an output signal thereof is radically lowered so that a portion corresponding to the lowered signal appears dark. Such a problem occurred in a CMOS image sensor is called a black-crush phenomenon. To suppress this phenomenon, the following method is proposed. An amplifier (amp) that does not have a photodiode (hereinafter, referred to as pixel dummy amplification transistor) is formed within a pixel and a unit for detecting that a reset level outputted from a pixel shows an abnormal value indicating that massive light amount is incident is provided. When it is detected that the massive light amount is incident, the reset level is replaced by an output level of the pixel dummy amplification transistor (See Japanese Unexamined Patent Application Publication No. 2008-124527).
FIG. 1 is a schematic block diagram showing a conventional solid-state imaging device (CMOS image sensor).
The conventional CMOS image sensor has a pixel area 100 where a plurality of pixels are two-dimensionally arranged, a vertical scanning circuit 110 for selecting pixels, a correction unit 120 that is an integration of a black-crush correction unit and a longitudinal line correction unit, a pixel signal reading circuit 130, a horizontal scanning circuit 140, an analog front end (AFE) 150, an A/D convertor (ADC) 160, and an output processing unit 170, and a timing control unit 180.
With this configuration, each pixel in the pixel area 100 is provided with a photodiode 101 for performing photoelectric conversion and pixel transistors, such as a transfer transistor 102, an amplification transistor 103, a reset transistor 104, and a selection transistor 105.
In addition, the vertical scanning circuit 110 performs control so as to (i) supply a transfer pulse (TRG), a selection pulse (SEL), a reset pulse (RSE) and the like to each pixel transistor, (ii) convert signal electric charge obtained by the photodiode 101 to a pixel signal (SIG) and (iii) output the pixel signal (SIG) to the vertical signal line 190. Note that the vertical signal line 190 is provided at each pixel column, and is connected to each current source circuit 191, and an output terminal thereof is connected to the pixel signal reading circuit 130.
In addition, the correction unit 120 is provided, for each line of pixels, with a pixel dummy amplification transistor 121, a pixel dummy selection transistor 122, and a bias circuit 123 for applying a bias voltage to each pixel dummy amplification transistor 121. The correction unit 120 performs longitudinal line correction and black-crush correction. Note that the pixel dummy amplification transistor 121 and the pixel dummy selection transistor 122 are collectively referred to as a pixel dummy or a pixel dummy transistor.
In addition, the pixel signal reading circuit 130 (i) retains pixel signals of one line outputted from the vertical scanning circuit 110, (ii) sequentially transfers the pixel signals of the one line in the horizontal direction by control by the horizontal scanning circuit 140, and (iii) outputs the pixel signals to the analog front end (AFE) 150.
FIGS. 2 and 3 show a horizontal period timing for correcting longitudinal noises with regard to a gain.
First, after the pixel dummy selection transistor 122 selects a pixel dummy row, a reset signal (RST) is inputted, and a non-signal period begins. At this time, a bias set value (approximately VDD) in the non-signal period is inputted to the gate of the pixel dummy amplification transistor 121.
Subsequently, when a transfer gate is switched ON, a signal read-out period begins. At this time, a bias set value in bright time to be corrected is inputted to the gate of the pixel dummy amplification transistor 121.
FIG. 2 shows a horizontal period timing for black-crush correction in an effective period in accordance with a conventional embodiment. Since clamp operation is performed exclusively in the non-signal period, a level of a voltage drop amount (approximately Vth) by the clamp level+source follower in the pixel signal SIG is applied to the gate level of the pixel dummy amplification transistor 121. Since the voltage drop amount is Vth caused by the substrate bias of the pixel dummy amplification transistor 121, the voltage drop amount is set to be approximately Vth level. In addition, as shown in FIG. 2, in the signal read-out period, in order to turn OFF this black-crush correction unit, a level (e.g. GND level) that turns OFF the transistor that is the gate level of the pixel dummy amplification transistor 121 is applied.
When massive light, such as sunlight, is incident, the SIG level shows a voltage drop as shown by the dash line. However, the black-crush correction unit clamps the SIG level in the non-signal period. Thus, the black-crush phenomenon can be prevented.
An image sensor disclosed by the Japanese Unexamined Patent Application Publication No. 2008-124527 enables effective longitudinal line correction and the sun blackening correction (black-crush correction unit) so that a high-quality, small-size, and low-cost camera device can be achieved and that a high-quality imaging device can be provided.
However, the configuration according to the conventional technique has the following problem. The black-crush correction unit provided at each pixel column may cause fixed noises (so-called longitudinal noises) different according to each pixel column.